The present invention relates to a data processing system for supporting a virtual memory, and more particularly to page fault processing.
Page fault processing is carried out when an accessed address is not contained in a main memory.
In page fault processing, a resumption of instruction execution after the page fault is particularly complex to implement.
When the page fault occurs during the execution of the instruction, it is desirable to resume the execution from the point at which the page fault has occurred. To this end, it is necessary to save the contents of work registers and flip-flops used in the hardware unit, carry out the page fault processing and reload the saved contents before the execution of the instruction is resumed. However, this system includes many problems because many informations are included and they differ from machine to machine.
Accordingly, the following approaches have been usually used to process the page fault.
In a first approach, an address associated with an instruction is first checked before actually accessing the memory to see if a page fault will occur and then the instruction execution is begun. This approach is simple but has the disadvantage of long execution time because the addresses of every instruction have to be checked prior to beginning the execution of the instruction.
In a second approach which is disclosed in an article entitled "16-bit microprocessor enters virtual memory domain", Electronics, Apr. 24, 1980, the input data of the instructions is retained and reloaded when a page fault occurs and the execution of the instruction is to be resumed. This approach needs a special bus and an increased overhead to retain the input data.
An undesirable characteristic which is common to both of the above approaches is that the overhead increases even when a page fault does not occur.
It is a recent trend to use high class language oriented high function instructions in a new architecture computer and to execute the various functions at a high speed by using microprograms. In such a system, it is possible for the programmer who is not familiar with a detailed operation of the hardware to write the microprograms. In the above-mentioned approaches, the programmer must write the microprograms while giving attention to the possible occurrence of the page fault. Accordingly, the chance of error is high.